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In electronics, TO-5 (Transistor Outline 5) is a designation for a standardized metal semiconductor package used for transistors and some integrated circuits. The TO element stands for "transistor outline" and refers to a series of technical drawings produced by JEDEC.cite-ref-to-5-spec-1-0[1] The first commercial silicon transistors, the 2N696 and 2N697 from Fairchild Semiconductor, came in a TO-5 package.cite-ref-0-2-0[2]

• Construction and orientation

• Variants

• TO-39 / TO-9 / TO-16 / TO-42

• TO-12 / TO-33

• TO-75

• TO-76 / TO-77

• TO-78 / TO-79 / TO-80 / TO-99

• TO-74

• TO-96 / TO-97 / TO-100

• TO-73

• TO-101

• TO-205

• National Standards

• References

• External links

The tab is located 45° from pin 1, which is typically the emitter. The typical TO-5 package has a base diameter of 8.9 mm (0.35 in), a cap diameter of 8.1 mm (0.32 in), a cap height of 6.3 mm (0.25 in).cite-ref-to-5-spec-1-1[1] The pins are isolated from the package by individual glass-metal seals, or by a single resin potting. Sometimes one pin is connected directly to the metal case.

Several variants of the original TO-5 package have the same cap dimensions but differ in the number and length of the leads (wires). Somewhat incorrectly, TO-5 and TO-39 are often used in manufacturer's literature as synonyms for any package with the cap dimensions of TO-5, regardless of the number of leads, or even for any package with the diameter of TO-5, regardless of the cap height and the number of leads.cite-ref-3[3] Compared to TO-5, for the other variants (except TO-33 and TO-42) the minimum length of the leads was shortened from 38.1 mm (1.50 in) to 12.7 mm (0.50 in) which is sufficient for through-hole technology and leads to a cost reduction, whereas the longer leads were needed for point-to-point construction. Lead lengths of 25.4 mm (1.00 in) and 19.05 mm (0.750 in) are quite common but were not standardized separately by JEDEC. There are variants with between 2 and 12 leads. The leads are arranged in a circle with a diameter of 5.08 mm (0.200 in) (except TO-96, TO-97, TO-100, TO-101). Before the introduction of dual in-line packages in 1965, integrated circuits were packaged mostly in metal can packages such as the TO-5 variants with more than 3 leads.cite-ref-4[4]

The TO-39, TO-9, and TO-16 packages have 3 leads and differ in the shortened leads mentioned above from TO-5.cite-ref-5[5] Additionally, the TO-9 and TO-16 packages do not have a tab.cite-ref-6[6] The TO-42 package is almost identical to the TO-5 package (including the long leads) but has four stand-offs at the bottom of the base that keep the base about 0.5 mm above the circuit board.cite-ref-7[7] Possibly the TO-16 and TO-42 designations were not actually used.cite-ref-0-2-1[2]

The TO-12 and TO-33 packages have 4 leads.cite-ref-8[8] TO-33 has 38.1 mm (1.50 in) leadscite-ref-9[9] like TO-5 while TO-12 has 12.7 mm (0.50 in) leads. For transistors, the fourth wire is typically connected to the metal case as a means of electromagnetic shielding for radio frequency applications.

The TO-75 package has 6 leads (at most one of those may be omitted).cite-ref-10[10] The minimum angle between two adjacent leads is 60°.

The TO-76 and TO-77 packages have 8 leads (up to three of those may be omitted).cite-ref-11[11] The minimum angle between two adjacent leads is 45°. The TO-77 package differs from the TO-76 package only in that the bottom of a TO-77 package can sit directly on a circuit board whereas the TO-76 package requires a distance of up to 1.02 mm (0.040 in) between circuit board and package.cite-ref-12[12]

The TO-78,cite-ref-13[13] TO-79,cite-ref-14[14] TO-80,cite-ref-15[15] and TO-99cite-ref-16[16] packages have 8 leads (up to three of those may be omitted). The minimum angle between two adjacent leads is 45°. These packages differ from other variants in the height of the cap. Instead of 6.3 mm (0.25 in) the cap height is only 4.45 mm (0.175 in) for TO-78 / TO-99, 3.81 mm (0.150 in) for TO-79, and 2.41 mm (0.095 in) for TO-80. The TO-78 package differs from the TO-99 package only in that the bottom of a TO-78 package can sit directly on a circuit board whereas the TO-99 package requires a distance of up to 1.02 mm (0.040 in) between circuit board and package.

The TO-74 package has 10 leads (at most one of those may be omitted).cite-ref-17[17] The minimum angle between two adjacent leads is 36°.

The TO-96,cite-ref-18[18] TO-97,cite-ref-19[19] and TO-100cite-ref-20[20] packages have 10 leads (at most one of those may be omitted). The minimum angle between two adjacent leads is 36°. For these packages the diameter of the circle of leads is increased from 5.08 mm (0.200 in) to 5.84 mm (0.230 in). This allows a slightly increased chip area in a cap of unchanged diameter. TO-96 has the standard cap height of 6.3 mm (0.25 in), while TO-100 and TO-97 have reduced cap heights of 4.45 mm (0.175 in) (like TO-78) and 3.81 mm (0.150 in) (like TO-79), respectively.

The TO-73 package has 12 leads (at most one of those may be omitted).cite-ref-21[21] The minimum angle between two adjacent leads is 30°.

The TO-101 package has 12 leads (at most one of those may be omitted).cite-ref-22[22] The minimum angle between two adjacent leads is 30°. For this package the diameter of the circle of leads is increased from 5.08 mm (0.200 in) to 5.84 mm (0.230 in). This allows a slightly increased chip area in a cap of unchanged diameter. TO-101 has a reduced cap height of 4.45 mm (0.175 in) (like TO-78).

TO-205 is intended to replace previous definitions of packages with leads arranged in a circle with a diameter of 5.08 mm (0.200 in).cite-ref-23[23]cite-ref-jep95-24-0[24] The different outlines are now defined as variants of TO-205: TO-5 is renamed to TO-205-AA, TO-12 to TO-205-AB, TO-33 to TO-205-AC, TO-39 to TO-205-AD. A new package with 3 leads and a cap height of 4.32 mm (0.170 in) (similar to TO-78 / TO-99) is added as TO-205-AF.

| Standards organization | Standard | Designation for | Designation for | Designation for | Designation for | Designation for |

|---|---|---|---|---|---|---|

| Standards organization | Standard | TO-5 | TO-12 | TO-33 | TO-39 | TO-77 |

| JEDEC | JEP95 [ 24 ] | TO-205-AA | TO-205-AB | TO-205-AC | TO-205-AD | — |

| IEC | IEC 60191 [ a ] [ 25 ] | C4/B4A | C4/B6C | C4/B6A | C4/B4C | C4/B7C |

| DIN | DIN 41873 [ 26 ] [ 25 ] | 5A3 | 5C4 | | 5C3 | 5C8 |

| EIAJ / JEITA | ED-7500A [ a ] [ 27 ] | TC5/TB-5A | TC5/TB-14C | TC5/TB-14A | TC5/TB-5C | TC5/TB-15C |

| British Standards | BS 3934 [ a ] [ 28 ] [ 25 ] | SO-3/SB3-3A | SO-3/SB4-1B | | SO-3/SB3-3B | SO-3/SB8-1B |

| Gosstandart | GOST 18472—88 [ 29 ] | — | KT-2-12 [ b ] | — | KT-2-7 [ c ] | — |

| Rosstandart | GOST R 57439 [ 30 ] | — | KT-2-12 [ b ] | — | KT-2-7 [ c ] | — |

| Kombinat Mikroelektronik Erfurt | TGL 11811 [ 31 ] | — | — | — | B3/15-3a | — |

| Kombinat Mikroelektronik Erfurt | TGL 26713/07 [ 31 ] | — | — | — | F1BC3 | — |

cite-note-bc-251. These standards have separate drawings for the package case and the base.

cite-note-312. Russian: КТ-2-12

cite-note-323. Russian: КТ-2-7

cite-note-to-5-spec-11. ↑ "JEDEC TO-5 package specification" (PDF). JEDEC. Archived from the original (PDF) on June 18, 2017.

cite-note-0-22. ↑ "Fairchild 2N697". Transistor Museum. Retrieved 2021-07-16.

cite-note-33. ↑ "Metal Can Packages" (PDF). National Semiconductor / Texas Instruments. August 1999. pp. 7–14. Retrieved 2021-06-21.

cite-note-44. ↑ "1965: Package is the first to accommodate system design considerations". Computer History Museum. Retrieved 2021-06-21.

cite-note-55. ↑ "TO-39" (PDF). JEDEC. Archived from the original (PDF) on 2016-04-10. Retrieved 2021-06-21.

cite-note-66. ↑ "TO-9" (PDF). JEDEC. Archived from the original (PDF) on 2016-04-10. Retrieved 2021-06-21.

cite-note-77. ↑ "...does not meet the minimum criteria ...for registration." "TO-42" (PDF). JEDEC. Archived from the original (PDF) on 2016-04-05. Retrieved 2021-06-21.

cite-note-88. ↑ "TO-12" (PDF). JEDEC. Archived from the original (PDF) on 2016-04-05. Retrieved 2021-06-21.

cite-note-99. ↑ "TO-33" (PDF). JEDEC. Archived from the original (PDF) on 2016-04-04. Retrieved 2021-06-21.

cite-note-1010. ↑ "TO-75" (PDF). JEDEC. Archived from the original (PDF) on 2016-04-05. Retrieved 2021-06-21.

cite-note-1111. ↑ "TO-76" (PDF). JEDEC. Archived from the original (PDF) on 2016-04-04. Retrieved 2021-06-21.

cite-note-1212. ↑ "TO-77" (PDF). JEDEC. Archived from the original (PDF) on 2016-04-05. Retrieved 2021-06-21.

cite-note-1313. ↑ "TO-78" (PDF). JEDEC. Archived from the original (PDF) on 2016-04-05. Retrieved 2021-06-21.

cite-note-1414. ↑ "TO-79" (PDF). JEDEC. Archived from the original (PDF) on 2016-04-10. Retrieved 2021-06-21.

cite-note-1515. ↑ "TO-80" (PDF). JEDEC. Archived from the original (PDF) on 2016-04-05. Retrieved 2021-06-21.

cite-note-1616. ↑ "TO-99" (PDF). JEDEC. Archived from the original (PDF) on 2016-04-10. Retrieved 2021-06-21.

cite-note-1717. ↑ "TO-74" (PDF). JEDEC. Archived from the original (PDF) on 2016-04-10. Retrieved 2021-06-21.

cite-note-1818. ↑ "TO-96" (PDF). JEDEC. Archived from the original (PDF) on 2016-04-10. Retrieved 2021-06-21.

cite-note-1919. ↑ "TO-97" (PDF). JEDEC. Archived from the original (PDF) on 2016-04-05. Retrieved 2021-06-21.

cite-note-2020. ↑ "TO-100" (PDF). JEDEC. Archived from the original (PDF) on 2016-04-10. Retrieved 2021-06-21.

cite-note-2121. ↑ "TO-73" (PDF). JEDEC. Archived from the original (PDF) on 2016-04-10. Retrieved 2021-06-21.

cite-note-2222. ↑ "TO-101" (PDF). JEDEC. Archived from the original (PDF) on 2016-04-10. Retrieved 2021-06-21.

cite-note-2323. ↑ "Index by Device Type of Registered Transistor Outlines (TO)". JEDEC Publication No. 95 (PDF). JEDEC. October 2010. Retrieved 2021-07-13.

cite-note-jep95-2424. ↑ "Header Family 0.200 Pin Circle". JEDEC Publication No. 95 (PDF). JEDEC. November 1982. pp. 178–181. Retrieved 2021-07-13.

cite-note-iec-264. "Semiconductors" (PDF). Pro Electron. 1978. pp. 215–219. Retrieved 2021-06-17.

cite-note-275. "Semiconductor Databook" (PDF). Heilbronn: AEG-Telefunken. p. 15. Retrieved 2021-08-20.

cite-note-286. "EIAJ ED-7500A Standards for the Dimensions of Semiconductor Devices" (PDF). JEITA. 1996. Retrieved 2021-06-14.

cite-note-297. "Semiconductor and Photoelectric Devices" (PDF). Mullard. 1968. p. 457. Retrieved 2021-06-14.

cite-note-308. "ГОСТ 18472—88 ПРИБОРЫ ПОЛУПРОВОДНИКОВЫЕ - Основные размеры" [GOST 18472—88 Semiconductor devices - basic dimensions] (PDF) (in Russian). Rosstandart. 1988. pp. 37–38. Retrieved 2021-06-17.

cite-note-339. "ПРИБОРЫ ПОЛУПРОВОДНИКОВЫЕ - Основные размеры" [Semiconductor devices - basic dimensions] (PDF) (in Russian). Rosstandart. 2017. p. 45. Retrieved 2021-06-17.

cite-note-tgl26713-3410. "TGL 26713/07: Gehäuse für Halbleiterbauelemente - Bauform F" (PDF) (in German). Leipzig: Verlag für Standardisierung. June 1988. Retrieved 2021-06-15.

• TO-5 package from EESemi.com